1. Technical Field
The embodiments described herein relate to a semiconductor integrated circuit (IC) device, and more particularly, to a semiconductor IC device for controlling a sense amplifier.
2. Related Art
In general, predetermined time rules are applied when reading or writing data in response to an external read command or an external write command. For example, a time interval from an external active command to a read command (or write command) is set as a time tRCD, i.e., a RAS to CAS time delay. With respect to an address, the tRCD can be considered as a time rule from when a row address is input to when a column address is input, which is a time rule at a system level for signals provided in synchronization with external clock signals. Here, a delay time exists from when a corresponding bit line selection signal is activated to after a row address is input. It is important to activate a bit line selection signal at an appropriate time in order to accurately read or write data.
On the other hand, in a DRAM circuit, accurate operation of a sense amplifier is more important for reading than writing, but controlling the operation of a conventional sense amplifier is difficult. Accordingly, timing and control of tRCD-related circuits are adjusted by testing whether or not a tRCD margin is satisfied during a reading operation. However, it is difficult to perform the test while changing the activation timing of control signals of the related circuits in order to adjust the tRCD.